Changes To Table 23 - Analog Devices ADuCM320 Hardware Reference Manual

UG-498
Reference Configuration Register
Address: 0x40087834, Reset: 0x00, Name: AFEREFC
Table 23. Bit Descriptions for AFEREFC
Bits Bit Name
[7:4] RESERVED
3 REF
2 B2MA_PDB
1 B2V5R_PD
0 BG_PD
Description
Reserved.
Bypass the internal reference, and select the external reference.
0: select internal 2.51 V reference
1: select external 2.51 V reference
Power down the reference 2 mA output driving Buffer B.
0: power down 2.5 V reference output driving Buffer B
1: power up 2.5 V reference output driving Buffer B
2.5 V reference buffer power down.
0: power up 2.5 V reference buffer
1: power down 2.5 V reference buffer
Band gap power down.
0: power up 1.2 V band gap
1: power down 1.2 V band gap
Rev. C | Page 34 of 196
ADuCM320 Hardware Reference Manual
Reset Access
0x0 R
0x0 RW
0x0 RW
0x0 RW
0x0 RW