ADuCM320 Hardware Reference Manual
First Slave Address Device ID Register
Address: 0x4000343C, Reset: 0x0000, Name: I2C1ID0
Table 171. Bit Descriptions for I2C1ID0
Bits
Bit Name
[15:8]
RESERVED
[7:0]
ID0
Second Slave Address Device ID Register
Address: 0x40003440, Reset: 0x0000, Name: I2C1ID1
Table 172. Bit Descriptions for I2C1ID1
Bits
Bit Name
[15:8]
RESERVED
[7:0]
ID1
Third Slave Address Device ID Register
Address: 0x40003444, Reset: 0x0000, Name: I2C1ID2
Table 173. Bit Descriptions for I2C1ID2
Bits
Bit Name
[15:8]
RESERVED
[7:0]
ID2
Fourth Slave Address Device ID Register
Address: 0x40003448, Reset: 0x0000, Name: I2C1ID3
Table 174. Bit Descriptions for I2C1ID3
Bits
Bit Name
[15:8]
RESERVED
[7:0]
ID3
Description
Reserved.
Slave device ID 0. I2CID0[7:1] is programmed with the device ID. I2CID0[0]
is don't care. See the ADR10EN bit in the slave control register to see how
this register is programmed with a 10-bit address.
Description
Reserved.
Slave device ID 1. I2CID1[7:1] is programmed with the device ID. I2CID1[0]
is don't care. See the ADR10EN bit in the slave control register to see how
this register is programmed with a 10-bit address.
Description
Reserved.
Slave device ID 2. I2CID2[7:1] is programmed with the device ID. I2CID2[0]
is don't care. See the ADR10EN bit in the slave control register to see how
this register is programmed with a 10-bit address.
Description
Reserved.
Slave device ID 3. I2CID3[7:1] is programmed with the device ID. I2CID3[0]
is don't care. See the ADR10EN bit in the slave control register to see how
this register is programmed with a 10-bit address.
Rev. C | Page 121 of 196
UG-498
Reset
Access
0x0
R
0x0
RW
Reset
Access
0x0
R
0x0
RW
Reset
Access
0x0
R
0x0
RW
Reset
Access
0x0
R
0x0
RW
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