Wake-Up Timer; Wake-Up Timer Features; Wake-Up Timer Block Diagram; Wake-Up Timer Overview - Analog Devices ADuCM320 Hardware Reference Manual

ADuCM320 Hardware Reference Manual

WAKE-UP TIMER

WAKE-UP TIMER FEATURES


32-bit counter (count down or count up)

Three clock sources with programmable prescaler (1, 16, 256, or 32768)
o
Peripheral clock (PCLK)
o
32 kHz internal oscillator (LFOSC)
o
External clock applied on Pin P1.0 (ECLKIN)

Four compare points, one automatic increment

WAKE-UP TIMER BLOCK DIAGRAM

CLOCK SOURCES

WAKE-UP TIMER OVERVIEW

The wake-up timer (Timer 4) block consists of a 32-bit counter clocked from one of three different sources: the system clock (PCLK), the
internal oscillator (LFOSC), or an external clock applied on Pin P1.0 (ECLKIN). The selected clock source can be scaled down using a
prescaler of 1, 16, 256, or 32768. The wake-up timer continues to run independent of the clock source used when the PCLK clock is disabled.
The timer can be used in free running or periodic mode. In free running mode, the timer counts from 0x00000000 to 0xFFFFFFFF and
then restarts at 0x00000000. In periodic mode, the timer counts from 0x00000000 to T4WUFD (T4WUFD0 and T4WUFD1).
In addition, the wake-up timer has four specific time fields to compare with the wake-up counter: T4WUFA, T4WUFB, T4WUFC, and
T4WUFD. All four wake-up compare points can generate interrupts or wake-up signals. When the timer is in free running mode, T4WUFA,
T4WUFB, T4WUFC, andT4WUFD must be reconfigured in software to generate a periodic interrupt.

WAKE-UP TIMER OPERATION

The wake-up timer comparator registers must be configured before starting the timer. The timer is started by writing the control enable
bit (T4CON[7]). The timer increments until the value reaches full scale in free running mode or when T4WUFD matches the wake-up
value, T4VAL.
The wake-up timer is a 32-bit timer. Its current value is stored in two 16-bit registers: T4VAL1 stores the upper 16 bits, and T4VAL0
stores the lower 16 bits.
When T4VAL0 is read, T4VAL1 is frozen at its current value until it is subsequently read. The control bit FREEZE (T4CON[3]) must be
set to freeze the T4VAL register between the lower and upper reads.
Clock Selection
Clock selection is made by setting T4CON[10:9].
If PCLK is selected (T4CON[10:9] = 00), configuring T4CON[1:0] = 00 results in a prescaler of 4.
Synchronization to the LFOSC clock domain is done automatically by hardware, and precautions concerning asynchronous clocks as
described in Timer 0, Timer 1, and Timer 2 do not apply.
12-BIT INTERVAL A
PCLK
PRESCALER
LFOSC
1, 16, 256,
OR 32768
ECLKIN
Figure 30. Wake-Up Timer Block Diagram
32-BIT COMPARE A 32-BIT COMPARE B
32-BIT COMPARE C 32-BIT COMPARE D
32-BIT UP/DOWN COUNTER
TIMER 4 VALUE
Rev. C | Page 169 of 196
TIMER 4 INTERRUPT
MCU WAKE-UP
UG-498