Analog Devices ADuCM320 Hardware Reference Manual page 193

ADuCM320 Hardware Reference Manual
MDIO Interrupt Enables Register
Address: 0x40005C1C, Reset: 0x0000, Name: MDIEN
Enables interrupts on specified events.
Table 300. Bit Descriptions for MDIEN
Bits Bit Name
[15:8] RESERVED
7 MD_PHYNI
6 MD_PHYMI
5 MD_DEVNI
4 MD_DEVMI
3 MD_RDFI
2 MD_INCFI
1 MD_ADRI
0 MD_WRFI
MDIO Read PHYADDR Pins Register
Address: 0x40005C20, Reset: 0x0000, Name: MDPIN
Reads the MDIO address pins.
Table 301. Bit Descriptions for MDPIN
Bits Bit Name
[15:5] RESERVED
[4:0] MD_PIN
Description
Reserved.
If set, interrupt is requested when MD_PHYN becomes active.
If set, interrupt is requested when MD_PHYM becomes active.
If set, interrupt is requested when MD_DEVN becomes active.
If set, interrupt is requested when MD_DEVM becomes active.
If set, interrupt is requested when MD_RDF becomes active.
If set, interrupt is requested when MD_INCF becomes active.
If set, interrupt is requested when MD_ADRF becomes active.
If set, interrupt is requested when MD_WRF becomes active.
Description
Reserved
Reads PRTADR pins
Rev. C | Page 193 of 196
UG-498
Reset Access
0x0 R
0x0 RW
0x0 RW
0x0 RW
0x0 RW
0x0 RW
0x0 RW
0x0 RW
0x0 RW
Reset Access
0x0 R
0x0 R