Read/Write (R/W); Table 2-9. Data Strobe Control Of Data Bus - Motorola MC68306 User Manual

additional information about the interaction between HALT and RESET , refer to 3.5 Reset
Operation and for more information on HALT and BERR , refer to 3.4 Bus Error and Halt
Operation.
Processor assertion of HALT indicates a double bus fault condition. This condition is
unrecoverable; the MC68306 must be externally reset to resume operation.
2.1.12 Read/Write (R/
This three-state, bi-directional signal defines the data bus transfer as a read or write cycle.
The R/W signal relates to the data strobe signals described in the following paragraphs.
2.1.13 Upper And Lower Data Strobes (
These three-state, bi-directional signals and R/W control the flow of data on the data bus.
Table 2-9 lists the combinations of these signals, the corresponding data on the bus, and
the OE, LW, and UW signals. When the R/W line is high, the processor reads from the
data bus. When the R/W line is low, the processor drives the data bus. When another bus
master controls the bus, the UDS, LDS, and R/ W pins become inputs and the OE, LW,
and UW signals are still decoded as shown in Table 2-9.
UDS LDS
High High
Low Low
High Low
Low High
Low Low
High Low
Low High
*These conditions are a result of current implementation and may not appear
on future devices.
2.1.14 Upper-Byte Write (
This signal is a combination of R/W low and UDS low for writing the upper-byte of a 16-bit
port. This signal simplifies memory system design by explicitly signalling that data is valid
on the upper portion of the data bus on a write operation. UW is also decoded for external
bus masters.
2-8
W
)

Table 2-9. Data Strobe Control of Data Bus

W
R/ D8–D15
— No Valid Data
High Valid Data Bits
15–8
High No Valid Data
High Valid Data Bits
15–8
Low Valid Data Bits
15–8
Low Valid Data Bits
7–0*
Low Valid Data Bits
15–8
UW
)
MC68306 USER'S MANUAL
UDS LDS
, )
OE
D0–D7
No Valid Data High
Valid Data Bits Low
7–0
Valid Data Bits Low
7–0
No Valid Data Low
Valid Data Bits High
7–0
Valid Data Bits High
7–0
Valid Data Bits High
15–8*
UW LW
High High
High High
High High
High High
Low Low
High Low
Low High
MOTOROLA