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Timer Interface Module B (TIMB)
12.10.4 TIMB Channel Status and Control Registers
Technical Data
214
Each of the TIMB channel status and control registers does the
following:
•
Flags input captures and output compares
•
Enables input capture and output compare interrupts
•
Selects input capture, output compare, or PWM operation
•
Selects high, low, or toggling output on output compare
•
Selects rising edge, falling edge, or any edge as the active input
capture trigger
•
Selects output toggling on TIMB overflow
•
Selects 100% PWM duty cycle
•
Selects buffered or unbuffered output compare/PWM operation
Address:
$0045
Bit 7
6
Read:
CH0F
CH0IE
Write:
0
Reset:
0
0
Figure 12-9. TIMB Channel 0 Status and Control Register (TBSC0)
Address:
$0048
Bit 7
6
Read:
CH1F
CH1IE
Write:
0
Reset:
0
0
Figure 12-10. TIMB Channel 1 Status and Control Register (TBSC1)
Timer Interface Module B (TIMB)
5
4
3
MS0B
MS0A
ELS0B
0
0
0
5
4
3
0
MS1A
ELS1B
0
0
0
2
1
Bit 0
ELS0A
TOV0
CH0MAX
0
0
0
2
1
Bit 0
ELS1A
TOV1
CH1MAX
0
0
0
MC68HC908AB32
Rev. 1.0
—
MOTOROLA
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