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Addr.
Register Name
$003C
Reserved
Port D Input Pullup Enable
$003D
Register
(PTDPUE)
Port F Input Pullup Enable
$003E
Register
(PTFPUE)
Configuration Register 2
$003F
(CONFIG2)
† One-time writable register after each reset.
Timer B Status and
$0040
Control Register
(TBSC)
Timer B Counter
$0041
Register High
(TBCNTH)
Timer B Counter
$0042
Register Low
(TBCNTL)
Timer B Counter Modulo
$0043
Register High
(TBMODH)
Timer B Counter Modulo
$0044
Register Low
(TBMODL)
Timer B Channel 0 Status
$0045
and Control Register
(TBSC0)
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 11)
MC68HC908AB32
Rev. 1.0
—
MOTOROLA
Bit 7
6
Read:
R
R
Write:
Reset:
Read:
PTDPUE7 PTDPUE6 PTDPUE5 PTDPUE4 PTDPUE3 PTDPUE2 PTDPUE1 PTDPUE0
Write:
Reset:
0
0
Read:
PTFPUE7 PTFPUE6 PTFPUE5 PTFPUE4 PTFPUE3 PTFPUE2 PTFPUE1 PTFPUE0
Write:
Reset:
0
0
Read:
R
EEDIVCLK
Write:
†
Reset:
0
Read:
TOF
TOIE
Write:
0
Reset:
0
0
Read:
Bit 15
14
Write:
Reset:
0
0
Read:
Bit 7
6
Write:
Reset:
0
0
Read:
Bit 15
14
Write:
Reset:
1
1
Read:
Bit 7
6
Write:
Reset:
1
1
Read:
CH0F
CH0IE
Write:
0
Reset:
0
0
= Unimplemented
Memory Map
5
4
3
R
R
R
0
0
0
0
0
0
R
R
R
0
0
TSTOP
TRST
1
0
0
13
12
11
0
0
0
5
4
3
0
0
0
13
12
11
1
1
1
5
4
3
1
1
1
MS0B
MS0A
ELS0B
0
0
0
R
Memory Map
Input/Output (I/O) Section
2
1
Bit 0
R
R
R
0
0
0
0
0
0
R
R
R
PS2
PS1
PS0
0
0
0
10
9
Bit 8
0
0
0
2
1
Bit 0
0
0
0
10
9
Bit 8
1
1
1
2
1
Bit 0
1
1
1
ELS0A
TOV0
CH0MAX
0
0
0
= Reserved
Technical Data
51
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