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MC68HC908AB32
Rev. 1.0
—
MOTOROLA
These two read/write registers are respectively loaded with the contents
of the EEPROM timebase divider non-volatile registers (EEDIVHNVR
and EEDIVLNVR) after a reset.
Address:
$FE1A
Bit 7
6
Read:
R
EEDIVSECD
Write:
Reset:
Figure 5-5. EEPROM Divider Register High (EEDIVH)
Address:
$FE1B
Bit 7
6
Read:
EEDIV7
EEDIV6
Write:
Reset:
Figure 5-6. EEPROM Divider Register Low (EEDIVL)
EEDIVSECD — EEPROM Divider Security Disable
This bit enables/disables the security feature of the EEDIV registers.
When EEDIV security feature is enabled, the state of the registers
EEDIVH and EEDIVL are locked (including this EEDIVSECD bit). The
EEDIVHNVR and EEDIVLNVR non-volatile memory registers are
also protected from being erased/programmed.
1 = EEDIV security feature disabled
0 = EEDIV security feature enabled
EEDIV[10:0] — EEPROM Timebase Prescaler
These prescaler bits store the value of EEDIV which is used as the
divisor to derive a timebase of 35µs from the selected reference clock
source (CGMXCLK or bus clock, see
for the EEPROM related internal timer and circuits. EEDIV[10:0] bits
are readable at any time. They are writable when EELAT=0 and
EEDIVSECD=1.
5
4
R
R
Contents of EEDIVHNVR ($FE10)
5
4
EEDIV5
EEDIV4
Contents of EEDIVLNVR ($FE11)
EEPROM
EEPROM Registers
3
2
1
R
EEDIV10
EEDIV9
3
2
1
EEDIV3
EEDIV2
EEDIV1
6.5 Configuration Register
Technical Data
EEPROM
Bit 0
EEDIV8
Bit 0
EEDIV0
2)
81
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