Functional Description - Motorola MC68HC908AB32 Technical Data Manual

9.4 Functional Description

OSC2
OSC1
SIMOSCEN
CGMRDV
PHASE
DETECTOR
LOCK
DETECTOR
LOCK
CGMVDV
MC68HC908AB32 Rev. 1.0
—
MOTOROLA
The CGM consists of three major sub-modules:
• Crystal oscillator circuit which generates the constant crystal
frequency clock, CGMXCLK.
• Phase-locked loop (PLL) which generates the programmable
VCO frequency clock CGMVCLK.
• Base clock selector circuit; this software-controlled circuit selects
either CGMXCLK divided by two or the VCO clock CGMVCLK
divided by two, as the base clock CGMOUT. The SIM derives the
system clocks from CGMOUT.
Figure 9-1 shows the structure of the CGM.
CRYSTAL OSCILLATOR
CGMRCLK
V CGMXFC
DDA
LOOP
FILTER
BANDWIDTH
CONTROL
AUTO ACQ
MUL[7:4]
FREQUENCY
DIVIDER
Figure 9-1. CGM Block Diagram
Clock Generator Module (CGM)
CLOCK
÷
SELECT
2
CIRCUIT
BCS
V
SS
VRS[7:4]
VOLTAGE
CONTROLLED
OSCILLATOR
PLL ANALOG
INTERRUPT
CONTROL
PLLIE PLLF
CGMVCLK
Clock Generator Module (CGM)

Functional Description

CGMXCLK
TO SIM, SCI
A
CGMOUT
TO SIM
B S*
*When S = 1, CGMOUT = B
USER MODE
PTC3
MONITOR MODE
CGMINT
Technical Data
133