Table of Contents
Advertisement
Input/Output (I/O) Ports
17.3 Port A
17.3.1 Port A Data Register (PTA)
17.3.2 Data Direction Register A (DDRA)
Technical Data
316
Port A is an 8-bit general-purpose bidirectional I/O port.
The port A data register contains a data latch for each of the eight port
A pins.
Address:
$0000
Bit 7
6
Read:
PTA7
PTA6
Write:
Reset:
Figure 17-2. Port A Data Register (PTA)
PTA[7:0] — Port A Data Bits
These read/write bits are software programmable. Data direction of
each port A pin is under the control of the corresponding bit in data
direction register A. Reset has no effect on port A data.
Data direction register A determines whether each port A pin is an input
or an output. Writing a logic 1 to a DDRA bit enables the output buffer for
the corresponding port A pin; a logic 0 disables the output buffer.
Address:
$0004
Bit 7
6
Read:
DDRA7
DDRA6
Write:
Reset:
0
0
Figure 17-3. Data Direction Register A (DDRA)
Input/Output (I/O) Ports
5
4
3
PTA5
PTA4
PTA3
Unaffected by Reset
5
4
3
DDRA5
DDRA4
DDRA3
0
0
0
2
1
Bit 0
PTA2
PTA1
PTA0
2
1
Bit 0
DDRA2
DDRA1
DDRA0
0
0
0
MC68HC908AB32
Rev. 1.0
—
MOTOROLA
Advertisement
Table of Contents
