Table of Contents
Advertisement
System Integration Module (SIM)
8.6.1.1 Hardware Interrupts
Technical Data
120
FROM RESET
INTERRUPT?
YES
INTERRUPT?
AS MANY INTERRUPTS
AS EXIST ON CHIP
FETCH NEXT
INSTRUCTION
INSTRUCTION?
INSTRUCTION?
Figure 8-10. Interrupt Processing
Processing of a hardware interrupt begins after completion of the current
instruction. When the instruction is complete, the SIM checks all pending
hardware interrupts. If interrupts are not masked (I-bit clear in the
condition code register), and if the corresponding interrupt enable bit is
set, the SIM proceeds with interrupt processing; otherwise, the next
instruction is fetched and executed.
System Integration Module (SIM)
BREAK
I BIT SET?
YES
NO
I-BIT SET?
NO
IRQ
YES
NO
STACK CPU REGISTERS
LOAD PC WITH INTERRUPT VECTOR
SWI
YES
NO
RTI
YES
UNSTACK CPU REGISTERS
NO
EXECUTE INSTRUCTION
SET I-BIT
MC68HC908AB32
Rev. 1.0
—
MOTOROLA
Advertisement
Table of Contents
