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Computer Operating Properly (COP)
20.4.5 Internal Reset
20.4.6 Reset Vector Fetch
20.4.7 COPD (COP Disable)
20.4.8 COPRS (COP Rate Select)
Technical Data
356
An internal reset clears the COP prescaler and the COP counter.
A reset vector fetch occurs when the vector address appears on the data
bus. A reset vector fetch clears the COP prescaler.
The COPD signal reflects the state of the COP disable bit (COPD) in the
configuration register 1. (See
The COPRS signal reflects the state of the COP rate select bit (COPRS)
in the configuration register 1. (See
Address:
$001F
Bit 7
6
Read:
LVISTOP
R
Write:
Reset:
0
0
R
= Reserved
Figure 20-2. Configuration Register 1 (CONFIG1)
COPRS — COP Rate Select Bit
COPRS selects the COP timeout period. Reset clears COPRS.
1 = COP timeout period is 2
0 = COP timeout period is 2
COPD — COP Disable Bit
COPD disables the COP module.
1 = COP module disabled
0 = COP module enabled
Computer Operating Properly (COP)
Figure
20-2.)
Figure
20-2.)
5
4
3
LVIRSTD LVIPWRD
SSREC
0
0
0
18
4
– 2
CGMXCLK cycles
13
4
– 2
CGMXCLK cycles
2
1
Bit 0
COPRS
STOP
COPD
0
0
0
MC68HC908AB32
Rev. 1.0
—
MOTOROLA
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