Port F; Port F Data Register (Ptf) - Motorola MC68HC908AB32 Technical Data Manual

17.8 Port F

17.8.1 Port F Data Register (PTF)

Alternative Function:
Additional Function:
MC68HC908AB32 Rev. 1.0
—
MOTOROLA
When DDREx is a logic 1, reading address $0008 reads the PTEx data
latch. When DDREx is a logic 0, reading address $0008 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
Table 17-6 summarizes the operation of the port E pins.
Table 17-6. Port E Pin Functions
DDRE
PTE Bit
Bit
(1)
0 X
1 X
Notes:
1. X = don't care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect the input.
Port F is an 8-bit special function port that shares six of its pins with the
timer interface modules (TIMA and TIMB).
The port F data register contains a data latch for each of the eight port F
pins.
Address: $0009
Bit 7 6
Read:
PTF7 PTF6
Write:
Reset:
Input pullup Input pullup Input pullup Input pullup Input pullup Input pullup Input pullup Input pullup
Figure 17-18. Port F Data Register (PTF)
Input/Output (I/O) Ports
Accesses
I/O Pin to DDRE
Mode
Read/Write
(2)
Input, Hi-Z DDRE[7:0]
Output DDRE[7:0]
5 4 3
PTF5 PTF4 PTF3
Unaffected by reset
TBCH1 TBCH0 TBCH3
Input/Output (I/O) Ports
Port F
Accesses to PTE
Read Write
Pin PTE[7:0]
PTE[7:0] PTE[7:0]
2 1 Bit 0
PTF2 PTF1 PTF0
TBCH2 TACH3 TACH2
Technical Data
329
(3)