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System Integration Module (SIM)
8.2 Introduction
Technical Data
110
8.8
SIM Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127
8.8.1
SIM Break Status Register . . . . . . . . . . . . . . . . . . . . . . . . . 127
8.8.2
SIM Reset Status Register . . . . . . . . . . . . . . . . . . . . . . . . . 128
8.8.3
SIM Break Flag Control Register . . . . . . . . . . . . . . . . . . . . 129
This section describes the system integration module (SIM), which
supports up to 24 external and/or internal interrupts. Together with the
CPU, the SIM controls all MCU activities. A block diagram of the SIM is
shown in
Figure
8-1.
Figure 8-2
The SIM is a system state controller that coordinates CPU and exception
timing. The SIM is responsible for:
•
Bus clock generation and control for CPU and peripherals:
– Stop/wait/reset/break entry and recovery
– Internal clock control
•
Master reset control, including power-on reset (POR) and COP
timeout
•
Interrupt control:
– Acknowledge timing
– Arbitration control timing
– Vector address generation
•
CPU enable/disable timing
•
Modular architecture expandable to 128 interrupt sources
Table 8-1
shows the internal signal names used in this section.
System Integration Module (SIM)
is a summary of the SIM I/O registers.
MC68HC908AB32
Rev. 1.0
—
MOTOROLA
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