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Input/Output (I/O) Ports
17.5 Port C
17.5.1 Port C Data Register (PTC)
Alternative Function:
Technical Data
320
When DDRBx is a logic 1, reading address $0001 reads the PTBx data
latch. When DDRBx is a logic 0, reading address $0001 reads the
voltage level on the pin. The data latch can always be written, regardless
of the state of its data direction bit.
Table 17-3
summarizes the operation of the port B pins.
Table 17-3. Port B Pin Functions
DDRB
PTB Bit
I/O Pin Mode
Bit
(1)
0
X
Input, Hi-Z
1
X
Output
Notes:
1. X = don't care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
Port C is a 6-bit general-purpose bidirectional I/O port. PTC2 pin can be
configured as an output pin for the system MCLK clock.
The port C data register contains a data latch for each of the six port C
pins.
Address:
$0002
Bit 7
6
Read:
0
0
Write:
Reset:
Figure 17-8. Port C Data Register (PTC)
Input/Output (I/O) Ports
Accesses to DDRB
Read/Write
(2)
DDRB[7:0]
DDRB[7:0]
5
4
3
PTC5
PTC4
PTC3
Unaffected by reset
Accesses to PTB
Read
Write
(3)
Pin
PTB[7:0]
PTB[7:0]
PTB[7:0]
2
1
Bit 0
PTC2
PTC1
PTC0
MCLK
MC68HC908AB32
Rev. 1.0
—
MOTOROLA
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