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Memory Map
Addr.
Register Name
Port G Data Register
$000A
(PTG)
Port H Data Register
$000B
(PTH)
Data Direction Register E
$000C
(DDRE)
Data Direction Register F
$000D
(DDRF)
Data Direction Register G
$000E
(DDRG)
Data Direction Register H
$000F
(DDRH)
SPI Control Register
$0010
(SPCR)
SPI Status and Control
$0011
Register
(SPSCR)
SPI Data Register
$0012
(SPDR)
SCI Control Register 1
$0013
(SCC1)
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 11)
Technical Data
46
Bit 7
6
Read:
0
0
Write:
Reset:
Read:
0
0
Write:
Reset:
Read:
DDRE7
DDRE6
Write:
Reset:
0
0
Read:
DDRF7
DDRF6
Write:
Reset:
0
0
Read:
0
0
Write:
Reset:
0
0
Read:
0
0
Write:
Reset:
0
0
Read:
SPRIE
R
Write:
Reset:
0
0
Read:
SPRF
ERRIE
Write:
Reset:
0
0
Read:
R7
R6
Write:
T7
T6
Reset:
Read:
LOOPS
ENSCI
Write:
Reset:
0
0
= Unimplemented
Memory Map
5
4
3
0
0
0
Unaffected by reset
0
0
0
Unaffected by reset
DDRE5
DDRE4
DDRE3
0
0
0
DDRF5
DDRF4
DDRF3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SPMSTR
CPOL
CPHA
1
0
1
OVRF
MODF
SPTE
0
0
1
R5
R4
R3
T5
T4
T3
Unaffected by reset
TXINV
M
WAKE
0
0
0
R
2
1
Bit 0
PTG2
PTG1
PTG0
0
PTH1
PTH0
DDRE2
DDRE1
DDRE0
0
0
0
DDRF2
DDRF1
DDRF0
0
0
0
DDRG2
DDRG1
DDRG0
0
0
0
0
DDRH1
DDRH0
0
0
0
SPWOM
SPE
SPTIE
0
0
0
MODFEN
SPR1
SPR0
0
0
0
R2
R1
R0
T2
T1
T0
ILTY
PEN
PTY
0
0
0
= Reserved
MC68HC908AB32
Rev. 1.0
—
MOTOROLA
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