Spi Characteristics - Motorola MC68HC908AB32 Technical Data Manual

Electrical Specifications

23.11 SPI Characteristics

Diagram
(1)
Number
Operating frequency
Master
Slave
Cycle time
1 Master
Slave
2 Enable lead time
3 Enable lag time
Clock (SPSCK) high time
4 Master
Slave
Clock (SPSCK) low time
5 Master
Slave
Data setup time (inputs)
6 Master
Slave
Data hold time (inputs)
7 Master
Slave
Access time, slave
8 CPHA = 0
CPHA = 1
9 Disable time, slave
Data valid time, after enable edge
10 Master
(5)
Slave
Data hold time, outputs, after enable edge
11 Master
Slave
Notes:
1. Numbers refer to dimensions in
2. All timing is shown with respect to 20% V
3. Time to data active from high-impedance state
4. Hold time to high-impedance state
5. With 100 pF on all SPI pins
Technical Data
380
(2)
Characteristic
(3)
(4)
Figure 23-1 and Figure 23-2.
and 70% V
DD DD
Electrical Specifications
Symbol Min
f
f
BUS(M)
BUS
f
DC
BUS(S)
t
cyc(M)
t
cyc(S)
t
15
Lead(S)
t
15
Lag(S)
t
100
SCKH(M)
t 50
SCKH(S)
t
100
SCKL(M)
t 50
SCKL(S)
t
45
SU(M)
t
SU(S)
t
H(M)
t 15
H(S)
t
A(CP0)
t
A(CP1)
t
DIS(S)
t
V(M)
t
V(S)
t
HO(M)
t
HO(S)
, unless noted; 100 pF load on all SPI pins.
Max Unit
f /2
/128
MHz
BUS
f MHz
BUS
t
2 128
cyc
1 — t
cyc
ns
—
ns
—
—
ns
ns
—
—
ns
ns
—
— ns
5 — ns
0 — ns
— ns
0 40 ns
0 20 ns
— 25 ns
— 10 ns
— 40 ns
0 — ns
5 — ns
MC68HC908AB32 Rev. 1.0
—
MOTOROLA