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Addr.
Register Name
Port E Data Register
$0008
Port F Data Register
$0009
Port G Data Register
$000A
Port H Data Register
$000B
Data Direction Register E
$000C
(DDRE)
Data Direction Register F
$000D
(DDRF)
Data Direction Register G
$000E
(DDRG)
Data Direction Register H
$000F
(DDRH)
Port D Input Pullup Enable
$003D
Register
(PTDPUE)
Port F Input Pullup Enable
$003E
Register
(PTFPUE)
MC68HC908AB32
Rev. 1.0
—
MOTOROLA
Bit 7
Read:
PTE7
Write:
(PTE)
Reset:
Read:
PTF7
Write:
(PTF)
Reset:
Read:
0
Write:
(PTG)
Reset:
Read:
0
Write:
(PTH)
Reset:
Read:
DDRE7
Write:
Reset:
0
Read:
DDRF7
Write:
Reset:
0
Read:
0
Write:
Reset:
0
Read:
0
Write:
Reset:
0
Read:
PTDPUE7 PTDPUE6 PTDPUE5 PTDPUE4 PTDPUE3 PTDPUE2 PTDPUE1 PTDPUE0
Write:
Reset:
0
Read:
PTFPUE7 PTFPUE6 PTFPUE5 PTFPUE4 PTFPUE3 PTFPUE2 PTFPUE1 PTFPUE0
Write:
Reset:
0
Figure 17-1. I/O Port Register Summary
Input/Output (I/O) Ports
6
5
4
PTE6
PTE5
PTE4
Unaffected by reset
PTF6
PTF5
PTF4
Unaffected by reset
0
0
0
Unaffected by reset
0
0
0
Unaffected by reset
DDRE6
DDRE5
DDRE4
0
0
0
DDRF6
DDRF5
DDRF4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Input/Output (I/O) Ports
3
2
1
PTE3
PTE2
PTE1
PTF3
PTF2
PTF1
0
PTG2
PTG1
0
0
PTH1
DDRE3
DDRE2
DDRE1
0
0
0
DDRF3
DDRF2
DDRF1
0
0
0
0
DDRG2
DDRG1
0
0
0
0
0
DDRH1
0
0
0
0
0
0
0
0
0
Technical Data
Introduction
Bit 0
PTE0
PTF0
PTG0
PTH0
DDRE0
0
DDRF0
0
DDRG0
0
DDRH0
0
0
0
313
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