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Input/Output (I/O) Ports
17.7.2 Data Direction Register E (DDRE)
NOTE:
Technical Data
328
Data direction register E determines whether each port E pin is an input
or an output. Writing a logic 1 to a DDRE bit enables the output buffer for
the corresponding port E pin; a logic 0 disables the output buffer.
Address:
$000C
Bit 7
6
Read:
DDRE7
DDRE6
Write:
Reset:
0
0
Figure 17-16. Data Direction Register E (DDRE)
DDRE[7:0] — Data Direction Register E Bits
These read/write bits control port E data direction. Reset clears
DDRE[7:0], configuring all port E pins as inputs.
1 = Corresponding port E pin configured as output
0 = Corresponding port E pin configured as input
Avoid glitches on port E pins by writing to the port E data register before
changing data direction register E bits from 0 to 1.
the port E I/O logic.
READ DDRE ($000C)
WRITE DDRE ($000C)
RESET
WRITE PTE ($0008)
READ PTE ($0008)
Figure 17-17. Port E I/O Circuit
Input/Output (I/O) Ports
5
4
3
DDRE5
DDRE4
DDRE3
0
0
0
DDREx
PTEx
2
1
Bit 0
DDRE2
DDRE1
DDRE0
0
0
0
Figure 17-17
shows
PTEx
MC68HC908AB32
Rev. 1.0
—
MOTOROLA
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