Operand Addressing (Byte, Word, Double Word) - HEIDENHAIN TNC 426 PB/M Technical Manual

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7.2.2 Operand Addressing (Byte, Word, Double Word)

Double word
Word
D0
W0
W2
D4
W4
D1020
W1020
W1022
December 2001
The memory for operands B (8 bits), W (16 bits), D (32 bits) is only 8 bits wide.
Since the operands can be 8, 16 or 32 bits wide, an overlapping of the memory
area will occur, which you must take into account when addressing memory:
Byte
B0
B1
B2
B3
B4
B5
B1020
B1021
B1022
B1023
During byte addressing every address, during word addressing every second
address, and during double-word addressing every fourth address from 0 to
4092 is accessible. The address parameter indicates the high byte of the word
address (W) and the highest byte of the double-word address.
Markers, timers and counters are addressed with the corresponding code
letters M, T or C followed by the operand number (e.g. M500, T7, C18).
Operands
Memory
Word address Double-word
8 bits
High byte
8 bits
Low byte
8 bits
High byte
8 bits
Low byte
8 bits
High byte
8 bits
Low byte
8 bits
High byte
8 bits
Low byte
8 bits
High byte
8 bits
Low byte
address
Highest byte
Lowest byte
Highest byte
Lowest byte
7 – 15

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