Data To Strobe Length Matching Requirements; Figure 47. Sdqs To Clock Trace Length Matching Diagram - Intel 852GM Design Manual

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Figure 47. SDQS to Clock Trace Length Matching Diagram

7.3.4.3.

Data to Strobe Length Matching Requirements

The data bit signals, SDQ[64:0] are grouped by byte lanes and associated with a data mask signal
SDM[7:0], and a data strobe, SDQS[7:0].
• The data and mask signals must be length matched to their associated strobe within ± 25 mils,
including package.
• For SO-DIMM0 this length matching includes the motherboard trace length to the pads of the SO-
DIMM0 connector (L1 + L2) plus package length.
• For SO-DIMM1, the motherboard trace length to the pads of the SO-DIMM1 connector (L1 + L2 +
L3) plus package length.
Refer to Section 7.2 for more details on package length compensation.
Length range formula for SDQ and SDM,
X = SDQS total length, including package length, as defined previously
Y = SDQ, SDM total length, including package length, within same byte lane as show in Figure 48,
where: ( X – 25 mils ) ≤ Y ≤ ( X + 25 mils )
®
Intel 852GM Chipset Platform Design Guide
GMCH Package
GMCH
Die
Note: All lengths are measured from GMCH die-
pad to SO-DIMM connector pad.
GMCH Package
GMCH
Die
Note: All lengths are measured from GMCH die-
pad to SO-DIMM connector pad.
System Memory Design Guidelines (DDR-SDRAM)
SO-DIMM0
SDQS[7:0]
SCK[1:0]
SCK#[1:0]
SO-DIMM0
SDQS[4:0]
SCK[4:3]
SCK#[4:3]
SDQS Length = Y0 , where
(X0 – 1.0") <= Y0 <= (X0 + 0.5)
Clock Reference Length = X0
SO-DIMM1
SDQS Length = Y1
(X1-1.0" ) <= Y1 <= ( X1+0.5")
Clock Ref. Length = X1
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