Common Clock (Cc) Agtl+ Signal Group; Asynchronous Agtl+ Signals; Topology 1A: Open Drain (Od) Signals Driven By The Processor - Ierr# And Ferr; Table 4. Processor Front Side Bus Control Signal Routing Guidelines - Intel 852GM Design Manual

Mobile Intel Pentium 4 Processor–M and Mobile Intel Celeron Processor FSB Design Guidelines
R
4.3.3.

Common Clock (CC) AGTL+ Signal Group

Common clock signals should be routed to a minimum pin-to-pin motherboard length of 0.5 inches and
a maximum motherboard length of 6.5 inches.

Table 4. Processor Front Side Bus Control Signal Routing Guidelines

Signal Names
CPU
RESET#
BR0#
BNR#
REQ[4:0]# HREQ[4:0]#
BPRI#
DEFER#
LOCK#
TRDY#
DRDY#
ADS#
DBSY#
HIT#
HITM#
RS[2:0]#
NOTES:
1. Trace width of 4 mils and trace spacing of 8 mils within signal groups. Entire trace for each signal routed on one
layer (recommended)
2. RESET# and BR0# are common clock AGTL+ signals without ODT (On die termination). These signals require
an external Rtt. The Rtt should be placed near CPU: L2<= 0.5 inches. Rtt = 51.1 ±1%.
4.3.4.

Asynchronous AGTL+ Signals

All signals must meet the AC and DC specifications as documented in the Mobile Intel
Processor–M Datasheet.
4.3.4.1. Topology 1A: Open Drain (OD) Signals Driven by the Processor – IERR#
and FERR#
The Topology 1A OD signals IERR# and FERR# should adhere to the following routing and layout
recommendations. Table 5 lists the recommended routing requirements for the IERR# and FERR#
signals of the Mobile Intel Pentium 4 Processor–M. The routing guidelines allow the signal to be routed
®
Intel 852GM Chipset Platform Design Guide
Topology
GMCH
CPURST# Stripline
BREQ0# Stripline
BNR# Stripline
Stripline
BPRI# Stripline
DEFER# Stripline
HLOCK# Stripline
HTRDY# Stripline
DRDY# Stripline
ADS# Stripline
DBSY# Stripline
HIT# Stripline
HITM# Stripline
RS[2:0]# Stripline
Routing Trace Length
(Pin-to-Pin)
Max Min
(inches) (inches)
6.5 0.5
6.5 0.5
6.5 0.5
6.5 0.5
6.5 0.5
6.5 0.5
6.5 0.5
6.5 0.5
6.5 0.5
6.5 0.5
6.5 0.5
6.5 0.5
6.5 0.5
6.5 0.5
Nominal Impedance Width & Spacing
(ohms)
55 ± 15%
55 ± 15%
55 ± 15%
55 ± 15%
55 ± 15%
55 ± 15%
55 ± 15%
55 ± 15%
55 ± 15%
55 ± 15%
55 ± 15%
55 ± 15%
55 ± 15%
55 ± 15%
®
Pentium
(mils)
4 & 8
4 & 8
4 & 8
4 & 8
4 & 8
4 & 8
4 & 8
4 & 8
4 & 8
4 & 8
4 & 8
4 & 8
4 & 8
4 & 8
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