Length Matching And Length Formulas; Package Length Compensation; Table 31. Length Matching Formulas - Intel 852GM Design Manual

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System Memory Design Guidelines (DDR-SDRAM)
7.1.

Length Matching and Length Formulas

The routing guidelines presented in the following subsections define the recommended routing
topologies, trace width and spacing geometries, and absolute minimum and maximum routed lengths for
each signal group, which are recommended to achieve optimal SI and timing. In addition to the absolute
length limits provided in the individual guideline tables, more restrictive length matching formulas are
also provided which further restrict the minimum to maximum length range of each signal group with
respect to clock, within the overall boundaries defined in the guideline tables, as required to guarantee
adequate timing margins. These secondary constraints are referred to as length matching constraints and
the formulas used are referred to as length matching formulas.
All signal groups, except feedback signals, are length matched to the DDR clocks. The clocks on a given
SO-DIMM are matched to within ± 25 mils of the target length. A different clock target length may be
used for each SO-DIMM. The difference in clock target lengths between SO-DIMM0 and SO-DIMM1
should not exceed 1 inch. A simple summary of the length matching formulas for each signal group is
provided in Table 31.

Table 31. Length Matching Formulas

Signal Group
Control to Clock
Command to Clock
CPC to Clock
Strobe to Clock
Data to Strobe
All length matching formulas are based on GMCH die-pad to SO-DIMM pin total length.
NOTE:
Package length tables are provided for all signals in order to facilitate this pad-to-pin matching. The
clock lengths to SO-DIMM1 may be up to 1.0 inch longer than the clock lengths to SO-DIMM0.
Length formulas should be applied to each SO-DIMM slot separately. The full geometry and routing
guidelines along with the exact length matching formulas and associated diagrams are provided in the
individual signal group guidelines sections.
7.2.

Package Length Compensation

As mentioned in Section 7.1, all length matching is done GMCH die-pad to SO-DIMM pin. The reason
for this is to compensate for the package length variation across each signal group. The GMCH does not
equalize package lengths internally as some previous GMCH components have, and therefore, the Intel
852GM GMCH requires length matching.
Package length compensation should not be confused with length matching as discussed in the previous
section. Length matching refers to constraints on the min and max length bounds of a signal group
based on clock length, whereas package length compensation refers to the process of adjusting out
package length variance across a signal group. There is of course some overlap in that both affect the
target length of an individual signal. Intel recommends that the initial route be completed based on the
length matching formulas in conjunction with nominal package lengths and that package length
compensation is performed as secondary operation.
84
Minimum Length
Clock –1.0"
Clock – 1.0"
Clock – 1.0"
Clock – 1.0"
Strobe – 25 mils
®
Intel
852GM Chipset Platform Design Guide
Maximum Length
Clock + 0.5"
Clock + 2.0"
Clock + 0.5"
Clock + 0.5"
Strobe + 25 mils
R

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