Platform Design Checklist
Pin Name
VCCAHPLL
VCCAGPLL
VCCADPLLA
VCCADPLLB
Decoupling guidelines are recommendations based on our reference board design. Customers will need to
NOTE:
take layout and PCB board design into consideration when deciding on overall decoupling solution.
14.7.7.
GMCH Power-up Sequence
Table 100. Intel 852GM GMCH Power-up Timing Specifications
PWROK active to RSTIN# inactive.
RSTIN# inactive to CPURST# inactive.
Figure 144. Intel 852GM GMCH Power-up Sequence
CPURST#
RSTIN#
PWROK
GMCH PWR
Rails
256
Configuration
Connect to VCC1_2
Connect to VCC1_2
Connect to VCC1_2
with filter network
Connect to VCC1_2
with filter network
Timing Parameters
F
Qty
0.1 µF
1
0.1 µF
1
0.1 µF
1
0.1 µH from power supply to GMCH pins,
with caps on GMCH side of inductor.
220 µF
1
0.1 µF
1
0.1 µH from power supply to GMCH pins,
with caps on GMCH side of inductor.
220 µF
1
Min
Max
Unit
1
ms
1
ms
1ms max
1ms min
®
Intel
852GM Chipset Platform Design Guide
Notes
Notes
See Figure 144
See Figure 144
R