14.8.11. Lan Interface; Figure 147. External Circuitry For The Rtc - Intel 852GM Design Manual

Platform Design Checklist

Figure 147. External Circuitry for the RTC

3.3V Sus
1k Ω
Vbatt
Notes
Reference Designators Arbitrarily Assigned
3.3V Sus is Active Whenever System Plugged In
Vbatt is Voltage Provided By Battery

14.8.11. LAN Interface

Pin Name
LAN_JCLK
LAN_RST#
LAN_RXD[2:0],
LAN_TXD[2:0]
LAN_RSTYSNC
264
32.768 kHz
C3
0.047uF
System
Pull-up/Pull-down
Connect to LAN_CLK on the platform LAN Connect Device. If LAN
interface is not used, leave the signal unconnected (NC).
10 k Ω pull-down to gnd Timing Requirement: Signal should be connected to power
monitoring logic, and should go high no sooner than 10 ms after
If ICH4-M LAN not
both VccSus3_3 and VccSus1_5 have reached their nominal
used
voltages.
NOTE: If ICH4-M LAN controller is NOT used, pull LAN_RST# down
through a 10 k Ω resistor.
Connect to LAN_RXD on the platform LAN Connect Device.
If LAN interface is not used, leave the signal unconnected (NC)
Connect to LAN_RSTSYNC on Platform LAN Connect Devce.
If LAN interface is not used, leave the signal unconnected (NC).
1uF
Xtal
C1
VBIAS, VCCRTC, RTCX1, and RTCX2 are ICH4-M pins
VBIAS is used to bias the ICH4 Internal Oscillator
VCCRTC powers the RTC well of the ICH4-M
RTCX1 is the Input to the Internal Oscillator
RTCX2 is the feedback for the external crystal
Notes
®
Intel 852GM Chipset Platform Design Guide
R1
10M Ω
RTCX1
R2
C2 10M Ω
VBIAS
R
VCCRTC
RTCX2