Mobile Intel Pentium 4 Processor–M and Mobile Intel Celeron Processor FSB Design Guidelines
R
same purpose described above. Refer to the Mobile Intel
®
852GM GMCH Chipset Datasheet for details on resistive compensation.
Intel
4.5.2.1.
Mobile Intel Pentium 4 Processor–M AGTL+ I/O Buffer Compensation
For the Mobile Intel Pentium 4 Processor–M, the COMP[1:0] pins (see Figure 19) must each be pulled-
down to ground with 51.1 Ω ± 1% resistors and should be connected to the Mobile Intel Pentium 4
Processor–M processor with a Zo = 51.1 Ω trace that is less than 0.5 inches from the processor pins.
COMP[1:0] traces should be at least 25 mils (> 50 mils preferred) away from any other toggling signal.
Figure 19. Mobile Intel Pentium 4 Processor-M COMP[1:0] Resistive Compensation
®
Intel
852GM Chipset Platform Design Guide
®
COMP[0]
51.1 Ω +/- 1%
®
4 Processor–M Datasheet and
Pentium
COMP[1]
51.1 Ω +/- 1%
51