Figure 20. Common Clock Topology; Table 14. Processor And Gmch Fsb Common Clock Signal Package Lengths And Minimum Board Trace Lengths - Intel 852GM Design Manual

R
common clock nets on the system board in order to meet the same minimum requirement for trace
lengths from the die-pad of the processor to the associated die-pad of the chipset.
For example:
ADS# = 997 mils board trace + 454 CPU PKG + 761 GMCH PKG = 2212 pad-to-pad length
BR0# = X mils board trace + 336 CPU PKG + 465 GMCH PKG = 2212 pad-to-pad length
Therefore: X = BR0# board trace = 2212 - 336 - 465 = 1411 pin to pin length.

Figure 20. Common Clock Topology

Table 14. Processor and GMCH FSB Common Clock Signal Package Lengths and Minimum Board
Trace Lengths
Signal Names
CPU
ADS#
BNR#
BPRI#
BR0#
DBSY#
DEFER#
DPWR#
DRDY#
HIT#
HITM#
LOCK#
RS0#
RS1#
RS2#
TRDY#
RESET#
®
Intel 852GM Chipset Platform Design Guide
Intel Celeron M Processor Front Side Bus Design Guidelines
Processor
Pad
Package Length
Intel Celeron M
GMCH
processor
ADS# 454
BNR# 506
BPRI# 424
BR0# 336
DBSY# 445
DEFER# 349
DPWR# 506
DRDY# 529
HIT# 420
HITM# 368
HLOCK# 499
RS0# 576
RS1# 524
RS2# 451
HTRDY# 389
CPURST# 455
Length L1
Package trace
Motherboard PCB trace
Total Pad-to-Pad Min.
Length Requirements
L1 (mils)
GMCH
761 2212
408 2212
573 2212
465 2212
608 2212
572 2212
518 2212
347 2212
489 2212
641 2212
515 2212
321 2212
495 2212
514 2212
511 2212
656 2212
GMCH
Pad
Min. Board Trace Length
(mils)
997
1298
1215
1411
1159
1291
1188
1336
1303
1203
1198
1315
1193
1247
1312
1101
55