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12.5.5.
ICH4-M Decoupling / Power Delivery Guidelines
12.5.5.1.
ICH4-M Decoupling
The ICH4-M is capable of generating large current swings when switching between logic high and logic
low. This condition could cause the component voltage rails to drop below specified limits. To avoid
this type of situation, ensure that the appropriate amount of decoupling capacitance is added in parallel
to the voltage input pins. Intel recommends that the developer use the amount of high frequency
decoupling capacitors specified in table below to ensure that component maintains stable supply
voltages. Low frequency decoupling is dependent on layout and system power supply design.
Table 95. ICH4-M Decoupling Requirements
Pin Name
VCC3_3
VCCSUS3_3
VCCLAN3_3
V_CPU_IO
VCC1_5
VCCSUS1_5
VCCLAN1_5
V5REF
V5REF_SUS
VCCRTC
VCCHI
VCCPLL
Capacitors should be placed less than 100 mils from the package.
NOTE:
12.5.6.
Hub Interface Decoupling
See Section 9.4 for details.
12.5.7.
FWH Decoupling
A 0.1-µF capacitor should be placed between the VCC supply pins and the VSS ground pins to decouple
high frequency noise, which may affect the programmability of the device. Value of low frequency bulk
decoupling capacitor is dependent on board layout and system power supply design.
®
Intel
852GM Chipset Platform Design Guide
Configuration
Connect to Vcc3_3S
Connect to Vcc3_3A
Connect to Vcc3_3
Connect to Vccp IMVP-IV / III
Connect to Vcc1_5S
Connect to Vcc1_5A
Connect to Vcc1_5
Connect to Vcc5_Ref
Connect to Vcc5A
Connect to Vcc_RTC
Connect to Vcc1_5S
Connect to Vcc1_5S
Intel 852GM Platform Power Delivery Guidelines
F
0.1 µF
0.1 µF
0.1 µF
1 µF
1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.1 µF
0.01 µF
Qty
6
2
2
1
1
2
2
2
1
1
1
2
1
1
231
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