Intel 852GM Design Manual page 312

A
Processor Decoupling
3..5,9,10,18,20,40,47,48 +VCC_IMVP
V_CORE
4
Mid and
C3E2
High
10UF
Frequency
Decoupling
3..5,9,10,18,20,40,47,48 +VCC_IMVP
V_CORE
Bulk and
C3D10
Mid
10UF
Frequency
Decoupling
3
2
1
A
B
Bulk decoupling values are tuned to Intel's IMVP III 2 phase VR design.
Circuits using other converter topologies may have different requirements.
C3R10
C2D2 C3T2 C3R9 C3D12
10UF 10UF 10UF 10UF
10UF
C3D13 C2R4 C3D8
C2T1 C3E4
10UF 10UF 10UF 10UF 10UF
B
C
C3T1
C3T4 C3R5 C3D9
C2R5 C3R6
10UF 10UF 10UF 10UF 10UF 10UF
3..5,9,10,18,20,40,47,48 +VCC_IMVP
V_CORE Mid
and High
C3T3 C3E1
Frequency
10UF 10UF
Decoupling
(under CPU)
C
D
C3R8
C2R1 C3R4 C2D3 C3R1
10UF 10UF 10UF 10UF 10UF
C2E1 C3E3 C3D5 C3D4 C3D2
C3D3 C2D1
10UF 10UF 10UF 10UF 10UF 10UF 10UF
Title
Processor Decoupling
Size Project:
A Intel 852GM CRB
D
E
4
C3R11 C3R7
C3R3
10UF 10UF 10UF
C3R2 C3D1
C3D11
10UF 10UF 10UF
3
2
1
Document Number Rev
A#
41 of 59
E