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A
PS_ON_SW#
DC/DC
SMC_SHUTDOWN
Turner
4
PWR_PWROK
PG 45
MASTER_RESET#
SW7J1
PG 45
3
ITP
PG 5
SMC_RST#
MAX809
2
PG 33
SMC_PROG_RST#
1
A
B
SW8J1
PG 45
U7A5
PM_PWROK
PG 39
Core VR
PG 41
U87A4A
PG 33
U8A2
SMC_RES#
PG 32
H_PWRGD
CPU
PG 3
B
C
Reset Map
PCI_RST#
ICH4
PG 19
DOCKING
PG 25
SMC
PG 32
H_CPURST#
C
D
PCI_RST_SLOTS#
Q9B3
PCI_GATED_RST#
PG32
U9C1
QSW
PG 24
MCH
PG 8
Title
Reset Map
Size
Project:
A
Intel Celeron M / 852GM CRB C26116
Date:
Wednesday, January 12, 2005
D
E
PCI
SLOTS
4
PG 22
R=0
LPC
SLOT
R=0
PG 37
3
ADD
CONN
PG 15
2
FWH
PG 31
SIO
PG 34
1
Document Number
Rev
4.403
Sheet
48
of
51
E
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