R
14.7.1.3.
SODIMM Decoupling Recommendation
Pin Name
Vcc1_25
Vcc2_5Sus
14.7.2.
FSB
Pin Name
HXSWING,
HYSWING
HXRCOMP,
HYRCOMP
HDVREF[2:0]
HAVREF
HCCVREF
Figure 142. Intel 852GM GMCH HXSWING and HYSWING Reference Voltage Generation Circuit
301
1%
R1
150
1%
®
Intel
852GM Chipset Platform Design Guide
F
Qty
0.1 µF
Place one 0.1 µF cap and one 0.01 µF close to every 4 pull-up resistors
terminated to Vcc1_25 (VTT for DDR signal termination). In S3,
0.01 µF
Vcc1_25 is powered OFF.
0.1 µF
9
A minimum of 9 high frequency caps are recommeneded to be placed
bewteen the SO-DIMMS. A minimum of 4 low frequency caps are
100-150 µF
4
required.
System
Pull-up/Pull-down
301 Ω 1% pull-up to VCCP
150 Ω 1% pull-down to gnd
27.4 Ω 1% pull down to gnd
49.9 Ω 1% pull-up to VCCP
100 Ω 1% pull-down to gnd
49.9 Ω 1% pull-up to VCCP
100 Ω 1% pull-down to gnd
49.9 Ω 1% pull-up to VCCP
100 Ω 1% pull-down to gnd
+VCCP
HXSWING
C1a
Notes
Signal voltage level = 1/3 of VCCP. C1a=0.1 µF.
C1b=0.1 µF. Trace should be 10-mil wide with 20-mil
spacing.
See Figure 142.
One pulled-down resistor per pin. Trace should be 10-
mil wide with 20-mil spacing.
Signal voltage level = 2/3 of VCCP. Need one 0.1 µF
cap and one 1 µF cap for voltage divider.
Signal voltage level = 2/3 of VCCP. Need one 0.1 µF
cap and one 1 µF cap for voltage divider.
Signal voltage level = 2/3 of VCCP. Need one 0.1 µF
cap and one 1 µF cap for voltage divider.
HXSWING
HYSWING
GMCH
Platform Design Checklist
Notes
+VCCP
301
1%
HYSWING]
150
1%
C1b
251