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A
LVDS Interface
+V3.3S
5,6,8,9,11,15,18,20,21,23,26,31,33..36,38..40,42,44,48
+V3.3S_LVDS
4
R5N6
0.01_1%
R5N4
1M
R5N5
100K
Q5B1
BSS138
1
7
LVDS_VDDEN
R5N3
100K
3
8,15,17,18,20,23..25,27,34,35,38..40,42,44,47
2
34
LVDS_BKLTSEL0
7
LVDS_BKLTCTL
R5B1
100K
7
LVDS_BKLTEN
R5C2
100K
1
A
B
Q5B2
+V3.3S_LVDS_PANEL
2
3
C5N1
C5B6
C5B7
1000PF
0.1UF
22UF
LVDS_VDDEN_D#
BIOS Note: Disable both
LVDS Panel Backlight
BKLTSEL lines before
enabling one.
+V5S
C5B3
U5B1
0.1UF
1
8
OE1#
VCC
2
7
LVDS_BKLTSEL1 34
1A
OE2#
3
6
1B
2B
R5N1
4
5
GND
2A
SMB_DATA_D
74CBT3306
R5N2
NO_STUFF_0
No Stuff
LVDS_BRIGHTNESS
6,8,11,12,18,39
6,7
B
C
+V3.3S
5,6,8,9,11,15,18,20,21,23,26,31,33..36,38..40,42,44,48
+V3.3S_LVDSDDC
R6N5
0.01_1%
R6N3
R6N4
2.2k
2.2k
7
LVDS_DDCPCLK
7
LVDS_DDCPDATA
7
LVDS_YAM0
7
LVDS_YAP0
7
LVDS_YAM1
7
LVDS_YAP1
7
LVDS_YAM2
7
LVDS_YAP2
7
LVDS_CLKAM
7
LVDS_CLKAP
7
LVDS_YBM0
7
LVDS_YBP0
7
LVDS_YBM1
7
LVDS_YBP1
7
LVDS_YBM2
7
LVDS_YBP2
7
LVDS_CLKBM
7
LVDS_CLKBP
+V3.3S
+V5S
8,15,17,18,20,23..25,27,34,35,38..40,42,44,47
R5N9
R5P4
0.01_1%
NO_STUFF_0.01_1%
+V3.3S_LVDSBKLT
0
SMB_DATA_S 6,8,11,12,18,39
LCLKCTLB 6..8
SMB_CLK_D
R5P1
0
SMB_CLK_S
LCLKCTLA
R5P2
NO_STUFF_0
No Stuff
C
D
J6B1
32
1
Test points for 24bpp support
2
3
4
5
7
LVDS_YAM3
6
7
LVDS_YAP3
7
8
9
10
11
12
13
7
LVDS_YBM3
14
15
7
LVDS_YBP3
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
LVDS,CONN30
5,6,8,9,11,15,18,20,21,23,26,31,33..36,38..40,42,44,48
+VDC
21,39,40,44
+V5S
R5P3
NO STUFF
R5N7
NO_STUFF_0.01_1%
0.01_1%
+VCC_LVDSBKLT
J5C1
1
2
3
4
5
6
7
INVERTER CONN
Title
LVDS
Size
Project:
A
Intel 852GM CRB
D
E
4
R6C2
NO_STUFF_0
R6C1
NO_STUFF_0
3
8,15,17,18,20,23..25,27,34,35,38..40,42,44,47
Option to power
backlight with
2
5.0V
1
Document Number
Rev
A#
16
of
59
E
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