Data To Strobe Length Matching Requirements; Figure 37. Sdqs To Clock Trace Length Matching Diagram - Intel 855GM Design Manual

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Figure 37. SDQS to Clock Trace Length Matching Diagram

G M C H P a c k a g e
N ote: A ll lengths are m easured from G M C H die-
pad to S O -D IM M connector pad.
G M C H P a c ka g e
N ote: A ll lengths are m easured from G M C H die-
pad to S O -D IM M c onnector pad.
6.3.4.3.

Data to Strobe Length Matching Requirements

The data bit signals, SDQ[71:0] are grouped by byte lanes and associated with a data mask signal
SDM[8:0], and a data strobe, SDQS[8:0].
• The data and mask signals must be length matched to their associated strobe within ± 25 mils,
including package.
• For SO-DIMM0 this length matching includes the motherboard trace length to the pads of the SO-
DIMM0 connector (L1 + L2 + S0) plus package length.
• For SO-DIMM1, the motherboard trace length to the pads of the SO-DIMM1 connector (L1 + L2 + L3
+ S1) plus package length.
Refer to Section 6.2 for more details on package length compensation.
Length range formula for SDQ and SDM,
X = SDQS total length, including package length, as defined previously
Y = SDQ, SDM total length, including package length, within same byte lane as show in Figure 38,
where: ( X – 25 mils ) ≤ Y ≤ ( X + 25 mils )
®
Intel 855GM/855GME Chipset Platform Design Guide
System Memory Design Guidelines (DDR-SDRAM) for SO-DIMM configuration
S D Q S [8:0 ]
G M C H
D ie
S C K [2:0 ]
S C K # [2 :0]
S D Q S [8:0 ]
G M C H
D ie
S C K [5:3 ]
S C K #[5 :3]
S O -D IM M 0
S D Q S Length = Y 0 , w here
C lock R eference Length = X0
S O -D IM M 0 S O -D IM M 1
S D Q S Length = Y 1
C lock R ef. Length = X1
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