Fwh; Fwh Decoupling; Table 71. Bus Capacitance Reference Chart; Table 72. Bus Capacitance/Pull-Up Resistor Relationship - Intel 852GM Design Manual

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Table 71. Bus Capacitance Reference Chart

Device
ICH4-M
CK408
SO-
DIMMS
PCI
Slots
Bus
Trace
Length
in inches

Table 72. Bus Capacitance/Pull-Up Resistor Relationship

Physical Bus Segment Capacitance
10.7.

FWH

The following provides general guidelines for compatibility and design recommendations for supporting
the FWH device. The majority of the changes will be incorporated in the BIOS. Refer to the FWH
Datasheet or equivalent.
10.7.1.

FWH Decoupling

Place a 0.1-µF capacitor between the V
frequency noise, which may affect the programmability of the device. Additionally, place a 4.7-µF
capacitor between the V
capacitors should be placed no further than 390 mils from the V
®
Intel 852GM Chipset Platform Design Guide
# of Devices/ Capacitance Includes
Trace Length
1 Pin Capacitance
1 Pin Capacitance
2 Pin Capacitance (10 pF) + 1 inch worth of trace capacitance (2 pF/inch)
per SO-DIMM and 2 pF connector capacitance per SO-DIMM
3
2 Each PCI add-in card is allowed up to 40 pF + 3 pF per each connector
3
4
5
6
≥24 2 pF per inch of trace length
≥36
≥48
0 to 100 pF
100 to 200 pF
200 to 300 pF
300 to 400 pF
supply pins and the V
CC
Pull-Up Range (For Vcc = 3.3 V
8.2 k Ω to 1.2 k Ω
4.7 k Ω to 1.2 k Ω
3.3 k Ω to 1.2 k Ω
2.2 k Ω to 1.2 k Ω
supply pins and the V
CC SS
ground pins to decouple low frequency noise. The
SS
CC
I/O Subsystem
ground pins to decouple high
supply pins.
Cap (pF)
12
10
28
42
86
129
172
215
258
48
72
96
173