SMB MAT-LC-C Series User Manual page 36

Logic 1 signal (minimum)
Logic 0 signal (max)
Connecting a 2-wire
proximity switch sensor
(BERO)
input filtering
Isolation (field vs logic)
Isolation group
Inputs that are switched
on at the same time
Maximum cable length
Shield
Unshielded
Digital Input Characteristics
Pulse catch input
Total
High counter Simplex
Two-ph
ase
CPU comes with IO wiring diagram
15 VDC，2.5mA
5 VDC，1mA
1mA (maximum leakage current allowed)
Configurable, support 0.2us, 0.4us, 0.8us, 1.6us, 3.2us, 6.4us,
12.8us, 0.2ms, 0.4ms, 0.8ms, 1.6ms, 3.2ms, 6.4ms, 12.8ms,
the default is 6.4ms
500V AC, 1 minute
see wiring diagram
10
500 meters (standard input)
50 meters (high-speed counter input)
300 meters (standard input)
10
6
6×500KHz
4×250KHz
36