Keithley SourceMeter 2600 Series Reference Manual page 544

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D-16 Status Model
Table D-4
System node and SRQ enable register bit attributes
To set system node enable register bits:
status.node_enable = status.MEASUREMENT_SUMMARY_BIT
status.node_enable = status.MSB
status.node_enable = status.ERROR_AVAILABLE
status.node_enable = status.EAV
status.node_enable = status.QUESTIONABLE_SUMMARY_BIT
status.node_enable = status.QSB
status.node_enable = status.MESSAGE_AVAILABLE
status.node_enable = status.MAV
status.node_enable = status.EVENT_SUMMARY_BIT
status.node_enable = status.ESB
status.node_enable = status.MASTER_SUMMARY_STATUS
status.node_enable = status.MSS
status.node_enable = status.OPERATION_SUMMARY_BIT
status.node_enable = status.OSB
To set service request enable register bits:
status.request_enable = status.MEASUREMENT_SUMMARY_BIT
status.request_enable = status.MSB
status.request_enable = status.SYSTEM_SUMMARY_BIT
status.request_enable = status.SSB
status.request_enable = status.ERROR_AVAILABLE
status.request_enable = status.EAV
status.request_enable = status.QUESTIONABLE_SUMMARY_BIT
status.request_enable = status.QSB
status.request_enable = status.MESSAGE_AVAILABLE
status.request_enable = status.MAV
status.request_enable = status.EVENT_SUMMARY_BIT
status.request_enable = status.ESB
status.request_enable = status.OPERATION_SUMMARY_BIT
status.request_enable = status.OSB
To read registers:
print(status.node_enable)
print(status.request_enable)
print(status.condition)
2600S-901-01 Rev. A / May 2006
Series 2600 System SourceMeters Reference Manual
Attribute
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Appendix D topics
Description
Enable MSB.
Enable MSB.
Enable EAV bit.
Enable EAV bit.
Enable QSB.
Enable QSB.
Enable MAV bit.
Enable MAV bit.
Enable ESB.
Enable ESB.
Enable MSS bit.
Enable MSS bit.
Enable OSB.
Enable OSB.
Enable MSB.
Enable MSB.
Enable SSB.
Enable SSB.
Enable EAV bit.
Enable EAV bit.
Enable QSB.
Enable QSB.
Enable MAV bit.
Enable MAV bit.
Enable ESB.
Enable ESB.
Enable OSB.
Enable OSB.
Request system enable register.
Request SRQ enable register.
Request status byte register.
Bit
B0
B0
B2
B2
B3
B3
B4
B4
B5
B5
B6
B6
B7
B7
B0
B0
B1
B1
B2
B2
B3
B3
B4
B4
B5
B5
B7
B7

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