Usbss Irq_Frame_Threshold_Tx1_2 Register (Irqframethold12); Usbss Irq_Frame_Threshold_Tx1_3 Register (Irqframethold13); Usbss Irq_Frame_Threshold_Tx1_2 Register (Irqframetholdtx12) Field Descriptions; Usbss Irq_Frame_Threshold_Tx1_3 Register (Irqframetholdtx13) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers
20.9.1.36 USBSS IRQ_FRAME_THRESHOLD_TX1_2 Register (IRQFRAMETHOLDTX12)
The USBSS IRQ_FRAME_THRESHOLD_TX1_2 register (IRQFRAMETHOLDTX12) defines the size of
the four FRAME thresholds for interrupt pacing for USB1. Each threshold contains is an 8-bit unsigned
number and can range from 0 to 255. A possible interrupt can be triggered if the count for that specific
endpoint has exceeded the value of the threshold. The counter for the compared value is also an 8-bit
unsigned number; therefore, setting the threshold to 255 prevents the possibility of a trigger.
The USBSS IRQ_FRAME_THRESHOLD_TX1_2 register is shown in
Table 20-67.
Figure 20-57. USBSS IRQ_FRAME_THRESHOLD_TX1_2 Register (IRQFRAMETHOLD12)
31
frame_thres_tx1_11
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 20-67. USBSS IRQ_FRAME_THRESHOLD_TX1_2 Register (IRQFRAMETHOLDTX12) Field
Bits Field
31-24 frame_thres_tx1_11
23-16 frame_thres_tx1_10
15-8 frame_thres_tx1_9
7-0 frame_thres_tx1_8
20.9.1.37 USBSS IRQ_FRAME_THRESHOLD_TX1_3 Register (IRQFRAMETHOLDTX13)
The USBSS IRQ_FRAME_THRESHOLD_TX1_3 register (IRQFRAMETHOLDTX13) defines the size of
the four FRAME thresholds for interrupt pacing for USB1. Each threshold contains is an 8-bit unsigned
number and can range from 0 to 255. A possible interrupt can be triggered if the count for that specific
endpoint has exceeded the value of the threshold. The counter for the compared value is also an 8-bit
unsigned number; therefore, setting the threshold to 255 prevents the possibility of a trigger.
The USBSS IRQ_FRAME_THRESHOLD_TX1_3 register is shown in
Table 20-68.
Figure 20-58. USBSS IRQ_FRAME_THRESHOLD_TX1_3 Register (IRQFRAMETHOLD13)
31
frame_thres_tx1_15
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 20-68. USBSS IRQ_FRAME_THRESHOLD_TX1_3 Register (IRQFRAMETHOLDTX13) Field
Bits Field
31-24 frame_thres_tx1_15
23-16 frame_thres_tx1_14
15-8 frame_thres_tx1_13
7-0 frame_thres_tx1_12
1852
Universal Serial Bus (USB)
24 23
frame_thres_tx1_10
R/W-0
Description
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 11.
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 10.
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 9.
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 8.
24 23
frame_thres_tx1_14
R/W-0
Description
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 15.
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 14.
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 13.
FRAME threshold value for tx_pkt_cmp_0 for USB1 endpoint 12.
© 2011, Texas Instruments Incorporated
Preliminary
16 15
frame_thres_tx1_9
R/W-0
Descriptions
16 15
frame_thres_tx1_13
R/W-0
Descriptions
www.ti.com
Figure 20-57 and described in
8 7
frame_thres_tx1_8
R/W-0
Figure 20-58 and described in
8 7
frame_thres_tx1_12
R/W-0
SPRUGX9 – 15 April 2011
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