Usbss Irq_Dma_Threshold_Tx0_3 Register (Irqdmatholdtx03); Usbss Irq_Dma_Threshold_Rx0_0 Register (Irqdmatholdrx00); Usbss Irq_Dma_Threshold_Tx0_3 Register (Irqdmatholdtx03) Field Descriptions; Usbss Irq_Dma_Threshold_Rx0_0 Register (Irqdmatholdrx00) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

Registers

20.9.1.11 USBSS IRQ_DMA_THRESHOLD_TX0_3 Register (IRQDMATHOLDTX03)

The USBSS IRQ_DMA_THRESHOLD_TX0_3 register (IRQDMATHOLDTX03) defines the size of the
four DMA thresholds for interrupt pacing for USB0. Each threshold contains an 8-bit unsigned number
and can range from 0 to 255. A possible interrupt can be triggered if the count for that specific endpoint
has exceeded the value of the threshold. The counter for the compared value is also an 8-bit unsigned
number; therefore, setting the threshold to 255 prevents the possibility of a trigger.
The USBSS IRQ_DMA_THRESHOLD_TX0_3 register is shown in
Table 20-41.
Figure 20-32. USBSS IRQ_DMA_THRESHOLD_TX0_3 Register (IRQDMATHOLDTX03)
31
dma_thres_tx0_15
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 20-42. USBSS IRQ_DMA_THRESHOLD_TX0_3 Register (IRQDMATHOLDTX03) Field
Bits Field
31-24 dma_thres_tx0_
15
23-16 dma_thres_tx0_
14
15-8 dma_thres_tx0_
13
7-0 dma_thres_tx0_
12

20.9.1.12 USBSS IRQ_DMA_THRESHOLD_RX0_0 Register (IRQDMATHOLDRX00)

The USBSS IRQ_DMA_THRESHOLD_RX0_0 register (IRQDMATHOLDRX00) defines the size of the
four DMA thresholds for interrupt pacing for USB0. Each threshold contains an 8-bit unsigned number
and can range from 0 to 255. A possible interrupt can be triggered if the count for that specific endpoint
has exceeded the value of the threshold. The counter for the compared value is also an 8-bit unsigned
number; therefore, setting the threshold to 255 prevents the possibility of a trigger.
The USBSS IRQ_DMA_THRESHOLD_RX0_0 register is shown in
Table 20-43.
Figure 20-33. USBSS IRQ_DMA_THRESHOLD_RX0_0 Register (IRQDMATHOLDRX00)
31
dma_thres_rx0_3
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 20-43. USBSS IRQ_DMA_THRESHOLD_RX0_0 Register (IRQDMATHOLDRX00) Field
Bits Field
31-24 dma_thres_rx0_3
23-16 dma_thres_rx0_2
15-8 dma_thres_rx0_1
7-0 Reserved
1838 Universal Serial Bus (USB)
24 23
dma_thres_tx0_14
R/W-0
Description
DMA threshold value for tx_pkt_cmp_0 for USB0 endpoint 15.
DMA threshold value for tx_pkt_cmp_0 for USB0 endpoint 14.
DMA threshold value for tx_pkt_cmp_0 for USB0 endpoint 13.
DMA threshold value for tx_pkt_cmp_0 for USB0 endpoint 12.
24 23
dma_thres_rx0_2
R/W-0
Description
DMA threshold value for rx_pkt_cmp_0 for USB0 endpoint 3.
DMA threshold value for rx_pkt_cmp_0 for USB0 endpoint 2.
DMA threshold value for rx_pkt_cmp_0 for USB0 endpoint 1.
Always read as 0. Writes have no effect.
© 2011, Texas Instruments Incorporated
Preliminary
Figure 20-31
16 15
dma_thres_tx0_13
R/W-0
Descriptions
Figure 20-33
16 15
dma_thres_rx0_1
R/W-0
Descriptions
www.ti.com
and described in
8 7
dma_thres_tx0_12
R/W-0
and described in
8 7
Reserved
R-0
SPRUGX9 – 15 April 2011
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