Cir Interrupt Enable Register (Ier); Cir Interrupt Enable Register (Ier) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

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19.3.5 Interrupt Enable Register (IER) - CIR Mode
The CIR interrupt enable register (IER) can be programmed to enable/disable any interrupt. There are 5
types of interrupt in these modes, TX status, RX overrun, RX stop interrupt, THR interrupt, and RHR
interrupt. Each interrupt can be enabled/disabled individually. The CIR interrupt enable register (IER) is
shown in Figure 19-32
NOTE: In CIR mode, the TXSTATUSIT bit has only one meaning corresponding to the case
MDR2[0] = 0.
The RXSTOPIT interrupt is generated based on the value set in the BOF Length register
(EBLR).
15
7 6
Reserved
R-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 19-14. CIR Interrupt Enable Register (IER) Field Descriptions
Bit Field
15-6 Reserved
5 TXSTATUSIT
4 Reserved
3 RXOVERRUNIT
2 RXSTOPIT
1 THRIT
0 RHRIT
SPRUGX9 – 15 April 2011
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Preliminary
and described in Table
Figure 19-32. CIR Interrupt Enable Register (IER)
5 4
TXSTATUSIT Reserved
R/W-0 R-0
Value Description
0 Reserved.
0 Disables the TX status interrupt.
1 Enables the TX status interrupt.
0 Reserved.
0 Disables the RX overrun interrupt.
1 Enables the RX overrun interrupt.
0 Disables the RX stop interrupt.
1 Disables the RX stop interrupt.
0 Disables the THR interrupt.
1 Enables the THR interrupt.
0 Disables the RHR interrupt.
1 Enables the RHR interrupt.
© 2011, Texas Instruments Incorporated
19-14.
Reserved
R-0
3
RXOVERRUNIT RXSTOPIT
R/W-0 R/W-0
Registers
2 1
THRIT RHRIT
R/W-0 R/W-0
UART/IrDA/CIR Module
8
0
1717