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19.3.3 Interrupt Enable Register (IER) - UART Mode
The interrupt enable register (IER) can be programmed to enable/disable any interrupt. There are
seven types of interrupt in this mode: receiver error, RHR interrupt, THR interrupt, XOFF received and
CTS/RTS change of state from low to high. Each interrupt can be enabled/disabled individually. There
is also a sleep mode enable bit. The UART interrupt enable register (IER) is shown in
described in
Table
15
7
6
CTSIT
RTSIT
R/W-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 19-12. UART Interrupt Enable Register (IER) Field Descriptions
Bit
Field
15-8
Reserved
7
CTSIT
6
RTSIT
5
XOFFIT
4
SLEEPMODE
3
MODEMSTSIT
2
LINESTSIT
1
THRIT
0
RHRIT
SPRUGX9 – 15 April 2011
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Preliminary
19-12.
Figure 19-30. UART Interrupt Enable Register (IER)
5
4
XOFFIT
SLEEPMODE
R/W-0
R/W-0
Value
Description
0
Reserved.
Can be written only when EFR[4] = 1.
0
Disables the CTS interrupt.
1
Enables the CTS interrupt.
Can be written only when EFR[4] = 1.
0
Disables the RTS interrupt.
1
Enables the RTS interrupt.
Can be written only when EFR[4] = 1.
0
Disables the XOFF interrupt.
1
Enables the XOFF interrupt.
Can be only written when EFR[4] = 1.
0
Disables sleep mode.
1
Enables sleep mode (stop baud rate clock when the module is inactive).
0
Disables the modem status register interrupt.
1
Enables the modem status register interrupt
0
Disables the receiver line status interrupt.
1
Enables the receiver line status interrupt.
0
Disables the THR interrupt.
1
Enables the THR interrupt.
0
Disables the RHR interrupt and time out interrupt.
1
Enables the RHR interrupt and time out interrupt.
© 2011, Texas Instruments Incorporated
Reserved
R-0
3
2
MODEMSTSIT
LINESTSIT
R/W-0
R/W-0
Registers
Figure 19-30
and
8
1
0
THRIT
RHRIT
R/W-0
R/W-0
1715
UART/IrDA/CIR Module
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