ST STM32L4 5 Series Reference Manual page 1680

USB on-the-go full-speed (OTG_FS)
FIFO_number = 5: 0x0200 0200 + (5
31 30 29
rw rw rw
15 14 13
rw rw rw
Bits 31:16 INEPTXFD: IN endpoint Tx FIFO depth
Bits 15:0 INEPTXSA: IN endpoint FIFOx transmit RAM start address
47.15.19 Host-mode registers
Bit values in the register descriptions are expressed in binary unless otherwise specified.
Host-mode registers affect the operation of the core in the host mode. Host mode registers
must not be accessed in device mode, as the results are undefined. Host mode registers
can be categorized as follows:
47.15.20 OTG Host configuration register (OTG_HCFG)
Address offset: 0x400
Reset value: 0x0000 0000
This register configures the core after power-on. Do not make changes to this register after
initializing the host.
31 30 29
Res. Res. Res. Res.
15 14 13
Res. Res. Res. Res.
1680/1830
28 27 26 25
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12 11 10 9
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This value is in terms of 32-bit words.
Minimum value is 16
This field contains the memory start address for IN endpoint transmit FIFOx. The address
must be aligned with a 32-bit memory location.
28 27 26 25
Res. Res. Res.
12 11 10 9
Res. Res. Res.
DocID024597 Rev 5
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0x200)
24 23 22 21
INEPTXFD
rw rw rw rw
8 7 6 5
INEPTXSA
rw rw rw rw
24 23 22 21
Res. Res. Res. Res.
8 7 6 5
Res. Res. Res. Res.
20 19 18 17
rw rw rw rw
4 3 2 1
rw rw rw rw
20 19 18 17
Res. Res. Res. Res.
4 3 2 1
Res. Res. FSLSS FSLSPCS
r rw
RM0351
16
rw
0
rw
16
Res.
0
rw