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HUAWEI USG9500 Series
Hardware Guide
The USG9560 has three SFUs. Two SFUs are integrated on the two SRUs, and another SFU
is independent. These three SFUs work in 2+1 backup mode to achieve simultaneous load
balancing. When one SFU is faulty or is being replaced, the other two SFUs automatically
take over its tasks to ensure service continuity. For details on USG9560 SFUs, see
E8KE-X8-SFUC-200.
The switching network responsible for switching data between LPUs/SPUs is a key
component of the USG9560. The USG9560 uses switching chips developed by Huawei and
Memory-Crossbar-Memory (M-C-M) to provide three-level switching. Level-1 and level-3
switching use a shared-memory model and are performed on LPUs/SPUs; level-2 switching
uses a Crossbar model and is performed on an SFU.
network of the USG9560. (The LPU is used as an example.)
Figure 1-29 USG9560 switching network
The level-1 switching chip on one LPU is fully connected to the level-2 switching chips on
the SFUs. The level-2 switching chips on the SFUs are also fully connected to the level-3
switching chip on another LPU. In addition, the level-2 crossbar switching chips work in load
balancing mode on multiple switching planes. The entire switching network is unblocked. The
process of transmitting data packets across the switching network is as follows:
1.
2.
3.
Issue 03 (2017-12-15)
Data packets enter an LPU through physical interfaces and are fragmented into cells of a
fixed length. These cells are then sent to the level-1 switching chips. After being
buffered and scheduled, the cells enter the crossbar switching chips on the SFU. The
level-1 switching chip on an LPU is fully connected with all of the level-2 switching
chips. As a result, the same number of cells can be distributed to each level-2 switching
plane. This implements load balancing on switching planes and facilitates fault tolerance.
After the cells reach the crossbar switching chips, the crossbar switching chips schedule
the cells to the corresponding outbound interfaces according to the destination interfaces
of the data packets. The cells are then sent to the level-3 switching chips on another
LPU. The switching of cells by the level-2 switching chips is then completed.
After the cells reach the level-3 switching chips on another LPU, the system searches for
the destination interfaces. Once found, the cells are reassembled and sent out through
physical interfaces, completing the switching of the data packets.
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Copyright © Huawei Technologies Co., Ltd.
1 Hardware Overview
Figure 1-29
shows the switching
1.4.3.2
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