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Appendix 4.5
(1) Master station (RX) Local station (RY), Master station (RWr) Local station
(RWw)
This indicates the time from the moment a local station CPU device turns ON (OFF) until the corresponding
master station CPU device turns ON (OFF).
Or, it indicates the time from when data is set in a local station CPU device until data is stored to a master station
CPU device.
(a) Expression
The meanings of symbols in the table are as follows:
• SM : Master station sequence scan time
• LS: Link scan time
• SL: Local station sequence scan time
• n: LS SM (Digits past the decimal point are rounded up to the nearest integer.)
• k: LS SL (Digits past the decimal point are rounded up to the nearest integer.)
With block guarantee of cyclic data per station
Calculation
value
Asynchronous mode
(SM n) + (LS 2) + {SL (k + 1)}
Normal value
(SM n) + (LS 3) + {SL (k + 1)}
Max. value
(b) Calculation example
Master station sequence scan time of 20ms, link scan time of 3ms, and local station sequence scan time of
10ms
With block guarantee of cyclic data per station
Calculation
value
Asynchronous mode
(20 1) + (3 2) + {10 (1 + 1)} =
Normal value
46ms
(20 1) + (3 3) + {10 (1 + 1)} =
Max. value
49ms
Transmission delay time of master station <-> local
station (Ver.1 compatible device station)
Synchronous mode
{(SM n) 2} + LS + {SL (k + 1)}
{(SM n) 3} + LS + {SL (k + 1)}
Synchronous mode
{(20 1) 2} + 3 + {10 (1 + 1)} =
63ms
{(20 1) 3} + 3 + {10 (1 + 1)} =
83ms
Without block guarantee of cyclic data per station
Asynchronous mode
Synchronous mode
SM + (LS 2) + SL
{(SM n) 2} + LS + SL
SM + (LS 3) + SL
{(SM n) 3} + LS + SL
Without block guarantee of cyclic data per station
Asynchronous mode
Synchronous mode
20 + (3 2) + 10 = 36ms
{(20 1) 2} + 3 + 10 = 53ms
20 + (3 3) + 10 = 39ms
{(20 1) 3} + 3 + 10 = 73ms
APPENDICES
A
441
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