Termination - Analog Devices VisualDSP++ 5.0 Service Manual

Before initializing the real-time clock service, the application should ini-
tialize the interrupt manager by calling
be deferred, rather than "live", then the deferred callback (DCB) manager
should also be initialized by calling
Some of the real-time clock hardware memory-mapped registers (MMR)
have certain limitations, in that they allow only one value to be written in
any given 1 Hz cycle. A value written to the MMR does not take effect
until the next 1 Hz tick, and any subsequent value written to the same reg-
ister within that time period is discarded. The real-time clock service
implements a register caching system that works around this issue, to
ensure that none of the intended functionality is lost. The application
should not attempt to access any of the memory-mapped registers directly,
but should depend solely upon the API functions provided by the service.
When the application calls
cleared. The prescaler bit is set so the real-time clock runs in 1 Hz mode,
like a regular clock. The callback environment is initialized and the event
flag register is cleared of any pending events. The real-time clock interrupt
handler is hooked into the IVG chain, and the real-time clock service is
ready to go. Real-time clock interrupts are initialized to also "wake up" the
processor. If this is not the desired behavior, the application may call the
API function
adi_rtc_DisableWakeup()

Termination

When the application no longer requires the real-time clock service, it
calls the termination function,
removes any callbacks that were installed, cleaning up all statically-defined
data structures.
VisualDSP++ 5.0 Device Drivers and System
Services Manual for Blackfin Processors
Real-Time Clock Service
adi_int_Init()
adi_dcb_Init()
, the register caches are
adi_rtc_Init()
.
adi_rtc_Terminate()
. If callbacks are to
.
. This function
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