Public Data Types, Enumerations, and Macros
Table 9-2. Port Control Manager Enumeration Types (Cont'd)
Enumeration Type
UART Operation
ADI_PORTS_DIR_UART0_RX
ADI_PORTS_DIR_UART0_TX
ADI_PORTS_DIR_UART1_RX
ADI_PORTS_DIR_UART1_TX
CAN Operation
ADI_PORTS_DIR_CAN_RX
ADI_PORTS_DIR_CAN_TX
Timer Operation
ADI_PORTS_DIR_TMR_CLK
ADI_PORTS_DIR_TMR_0
ADI_PORTS_DIR_TMR_1
ADI_PORTS_DIR_TMR_2
ADI_PORTS_DIR_TMR_3
ADI_PORTS_DIR_TMR_4
ADI_PORTS_DIR_TMR_5
ADI_PORTS_DIR_TMR_6
ADI_PORTS_DIR_TMR_7
GPIO Operation
ADI_PORTS_DIR_GPIO_PF0
ADI_PORTS_DIR_GPIO_PF1
ADI_PORTS_DIR_GPIO_PF2
ADI_PORTS_DIR_GPIO_PF3
ADI_PORTS_DIR_GPIO_PF4
9-18
Description
Enables flag pins for basic UART receive operation.
Enables flag pins for basic UART transmit operation.
Enables flag pins for basic UART receive operation.
Enables flag pins for basic UART transmit operation.
Enables flag pins for basic CAN receive operation.
Enables flag pins for basic CAN transmit operation.
Enables flag pin for Timer Input Clock use.
Enables flag pin for GP Timer 0 use.
Enables flag pin for GP Timer 1 use.
Enables flag pin for GP Timer 2 use.
Enables flag pin for GP Timer 3 use.
Enables flag pin for GP Timer 4 use.
Enables flag pin for GP Timer 5 use.
Enables flag pin for GP Timer 6 use.
Enables flag pin for GP Timer 7 use.
Enables PF0 pin for GPIO use.
Enables PF1 pin for GPIO use.
Enables PF2 pin for GPIO use.
Enables PF3 pin for GPIO use.
Enables PF4 pin for GPIO use.
VisualDSP++ 5.0 Device Drivers and System
Services Manual for Blackfin Processors
Need help?
Do you have a question about the VisualDSP++ 5.0 and is the answer not in the manual?