Adi_Ebiu_Sdram_Pasr; Adi_Ebiu_Sdram_Tcsr; Adi_Ebiu_Sdram_Srfs - Analog Devices VisualDSP++ 5.0 Service Manual

ADI_EBIU_SDRAM_PASR

When low power (2.5 V) SDRAM is used, this enumeration specifies the
banks to refresh. This enumeration corresponds to the
register.
EBIU_SDGCTL
ADI_EBIU_SDRAM_PASR_ALL
ADI_EBIU_SDRAM_PASR_INT01
ADI_EBIU_PASR_INT0_ONLY
The default value is specified by the following macro:
#define ADI_EBIU_SDRAM_PASR_DEFAULT ADI_EBIU_SDRAM_PASR_ALL

ADI_EBIU_SDRAM_TCSR

When low power (2.5 V) SDRAM is used, this enumeration specifies the
temperature-compensated, self-refresh value and corresponds to the
bits in the
EBIU_SDGCTL
ADI_EBIU_SDRAM_TCSR_45DEG
ADI_EBIU_SDRAM_TCSR_85DEG
The default value is specified by the following macro:
#define ADI_EBIU_SDRAM_TCSR_DEFAULT ADI_EBIU_SDRAM_TCSR_45DEG

ADI_EBIU_SDRAM_SRFS

This enumeration specifies whether the EBIU is to enable/disable
SDRAM self-refresh during periods of inactivity. This enumeration
corresponds to the
VisualDSP++ 5.0 Device Drivers and System
Services Manual for Blackfin Processors
External Bus Interface Unit Module
All four SDRAM banks are refreshed.
Internal SDRAM banks 0 and 1 are refreshed.
Only internal bank 0 is refreshed.
register.
SDRAM banks are refreshed if the temperature
exceeds 45° C.
SDRAM banks are refreshed if the temperature
exceeds 85° C.
bit in the
SRFS EBIU_SDGCTL
bits in the
PASR
register.
TCSR
4-41