Analog Devices VisualDSP++ 5.0 Service Manual page 128

Visualdsp++ 5.0 device drivers and system for blackfin processors
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Power Management API Reference
adi_pwr_Init
Description
This function initializes the power management module. The following
values must be set for successful initialization:
Processor variant
Package kind
Core voltage (V
DDINT
External voltage (V
CLKIN
These are communicated to the
pointer to a table of command-value pairs, terminated with the
ADI_PWR_CMD_END
For example, the following
Lite values:
ADI_PWR_COMMAND_PAIR ezkit_init[] = {
{ ADI_PWR_CMD_SET_PROC_VARIANT, ADI_PWR_PROC_BF533SKBC600 },
{ ADI_PWR_CMD_SET_PACKAGE,
{ ADI_PWR_CMD_SET_VDDEXT,
{ ADI_PWR_CMD_SET_CLKIN,
3-24
ADI_PWR_PROC_KIND
"ADI_PWR_PROC_KIND" on page
ADI_PWR_PACKAGE_KIND
the processor.
page
3-49.
)
ADI_PWR_VLEV
the core by an external voltage regulator. The internal voltage
regulator is bypassed. Its absence in the command table implies
that the internal regulator is to be used. An external voltage regu-
lator is required for the ADSP-BF533SKBC750 processor, as the
internal voltage regulator cannot supply the 1.4 V required for
the processor to run at 750 MHz.
)
ADI_PWR_VDDEXT
DDEXT
supplied to the voltage regulator. This value, when coupled with
the packaging, determines the maximum system clock (
frequency available. See
Frequency of the external clock oscillator supplied to the proces-
sor in either MHz or Hz.
adi_pwr_Init
command.
ADI_PWR_COMMAND_PAIR
VisualDSP++ 5.0 Device Drivers and System
value describes the processor variant. See
value describes the packaging type of
See"ADI_PWR_PACKAGE_KIND" on
value specifying the internal voltage, applied to
value specifies the external voltage
"ADI_PWR_VDDEXT" on page
function by passing a
table gives the EZ-KIT
ADI_PWR_PACKAGE_MBGA },
ADI_PWR_VDDEXT_330 },
25 /* MHz */ },
Services Manual for Blackfin Processors
3-50.
)
SCLK
3-53.

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