Running Applications on One Core Only
In this case, one core is used and the other core (core B) is disabled. Upon
reset, core B remains disabled until the code running on core A starts core
B running, by clearing bit 5 of the
*pSICA_SYSCR &= 0xFFDF;
Note that this does not wake core B if it is in the IDLE state. It only
allows core B to start executing instructions on startup. To wake core B
from IDLE, use one of the two supplemental interrupts (supplemental
interrupt 0 is taken over by system services, leaving supplemental
interrupt 1 for other uses).
Single-core applications loaded from flash memory or via the SPI port sat-
isfy the above synchronization requirement with no further intervention.
However, an emulator session within VisualDSP++ unavoidably wakes up
core B. The application developer must return core B to the disabled state
to meet the PLL programming requirements. There are two ways to do
this. The simplest is to run the following C code on core B:
void main() {
while(1) {
asm("IDLE;");
}
}
Whenever core B wakes up (due to the PLL programming sequence exe-
cuted by the power management service) it is immediately returned to the
IDLE state.
VisualDSP++ 5.0 Device Drivers and System
Services Manual for Blackfin Processors
Power Management Module
register. For example:
SICA_SYSCR
// clears bit 5 so Core B
// will start running
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