Analog Devices VisualDSP++ 5.0 Service Manual page 149

Visualdsp++ 5.0 device drivers and system for blackfin processors
Table of Contents

Advertisement

Table 3-6. ADI_PWR_COMMAND Available Commands (Cont'd)
Command
ADI_PWR_CMD_SET_VR_CLKBUFOE
ADI_PWR_CMD_SET_VR_CKELOW
ADI_PWR_CMD_SET_VR_USBWE
Commands valid only when passed to the adi_pwr_Control function.
ADI_PWR_CMD_GET_VDDINT
ADI_PWR_CMD_GET_VR_VLEV
ADI_PWR_CMD_GET_VR_FREQ
ADI_PWR_CMD_GET_VR_GAIN
ADI_PWR_CMD_GET_VR_WAKE
VisualDSP++ 5.0 Device Drivers and System
Services Manual for Blackfin Processors
Power Management Module
Associated Data Value
ADI_PWR_VR_CLKBUFOE
cating whether to enable or disable the
bit (processors with
CLKBUFOE
"ADI_PWR_VR_CLKBUFOE" on page
enumeration value
ADI_PWR_VR_CKELOW
indicating whether to enable or disable the
bit (processors with
CKELOW
See
"ADI_PWR_VR_CKELOW" on page
enumeration value
ADI_PWR_VR_USBWE
indicating whether to enable/disable the
wakeup bit. See
"ADI_PWR_VR_USBWE" on
page
3-54.
value containing the maximum
ADI_PWR_VLEV
core voltage level. See
"ADI_PWR_VLEV" on
page
3-53.
value containing the current volt-
ADI_PWR_VLEV
age level of the internal voltage regulator. Not
applicable when the internal regulator is
bypassed. See
"ADI_PWR_VLEV" on page
value containing the current
ADI_PWR_FREQ
voltage regulator switching oscillator frequency.
See
"ADI_PWR_VR_FREQ" on page
value containing the internal
ADI_PWR_GAIN
loop gain of the switching regulator loop. See
"ADI_PWR_VR_GAIN" on page
value specifying if the voltage
ADI_PWR_VR_WAKE
can be awakened from power-down upon an
interrupt from the RTC or a low-going edge on
the
pin. See
"ADI_PWR_VR_WAKE"
RESET#
on page
3-56.
enumeration value indi-
CLKBUFOE
bit only). See
3-55.
bit only).
CKELOW
3-54.
USB
3-53.
3-55.
3-55.
3-45

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the VisualDSP++ 5.0 and is the answer not in the manual?

Table of Contents