EBIU API Reference
adi_ebiu_Control
Description
The
adi_ebiu_Control()
DDR registers to be configured according to command-value pairs using
one of the following options. (See
page
4-38.)
• A single command-value pair is passed.
adi_ebiu_Control(
);
• A single command-value pair structure is passed.
ADI_EBIU_COMMAND_PAIR cmd = {
};
adi_ebiu_Control(ADI_EBIU_CMD_PAIR, (void*)&cmd);
• A table of
command-value entry in the table must be
.
0}
ADI_EBIU_COMMAND_PAIR table[] = {
{ ADI_EBIU_CMD_SET_SDRAM_FBBRW,
(void*)ADI_EBIU_SDRAM_FBBRW_ENABLE },
{ ADI_EBIU_CMD_SET_SDRAM_CDDBG,
(void*)ADI_EBIU_CDDBG_ENABLE },
{ ADI_EBIU_CMD_END, 0 }
};
4-12
function enables the EBIU SDRAM and EBIU
"ADI_EBIU_COMMAND_PAIR" on
ADI_EBIU_CMD_SET_SDRAM_SRFS,
(void*)ADI_EBIU_SDRAM_SRFS_ENABLE
ADI_EBIU_CMD_SET_SDRAM_SRFS,
(void*)ADI_EBIU_SDRAM_SRFS_ENABLE
ADI_EBIU_COMMAND_PAIR
VisualDSP++ 5.0 Device Drivers and System
Services Manual for Blackfin Processors
structures is passed. The last
{ADI_EBIU_CMD_END,
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